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| ADVANCED ISD1700A Series Multi-Message Single-Chip Voice Record & Playback Devices Confidential Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES TABLE OF CONTENTS 1 2 3 4 5 6 GENERAL DESCRIPTION ..............................................................................................................4 FEATURES......................................................................................................................................5 BLOCK DIAGRAM...........................................................................................................................6 PINOUT CONFIGURATION............................................................................................................7 PIN DESCRIPTION .........................................................................................................................8 FUNCTIONAL DESCRIPTION ......................................................................................................11 6.1 Detailed Description...............................................................................................................11 6.1.1 Audio Quality ...............................................................................................................11 6.1.2 Message Duration........................................................................................................11 6.1.3 Flash Storage ..............................................................................................................11 6.2 Memory Array Architecture ....................................................................................................11 6.3 Modes of Operations..............................................................................................................12 7 PUSH-BUTTON OPERATIONS ....................................................................................................13 7.1 Operation Overview ...............................................................................................................13 7.1.1 Record Operation ........................................................................................................13 7.1.2 Playback Operation .....................................................................................................14 7.1.3 Forward Operation.......................................................................................................14 7.1.4 Erase Operation...........................................................................................................15 7.1.5 Reset Operation...........................................................................................................16 7.1.6 VOL Operation.............................................................................................................17 7.1.7 FT (Feed-Through) Operation .....................................................................................17 7.2 vAlert Feature (Optional)........................................................................................................17 7.3 Sound Effect (SE) Editing ......................................................................................................17 7.3.1 Sound Effects ..............................................................................................................17 7.3.2 Entering SE Mode........................................................................................................18 7.3.3 SE Editing ....................................................................................................................18 7.3.4 Exiting SE Mode ..........................................................................................................18 7.3.5 Sound Effect Duration..................................................................................................18 7.4 Analog Inputs .........................................................................................................................19 7.4.1 Microphone Input .........................................................................................................19 7.4.2 AnaIn Input...................................................................................................................19 8 9 TIMING DIAGRAMS ......................................................................................................................20 8.1 Record, play and erase..........................................................................................................20 ABSOLUTE MAXIMUM RATINGS ................................................................................................23 -2- ISD1700A SERIES 9.1 Operating Conditions .............................................................................................................23 10 ELECTRICAL CHARACTERISTICS .............................................................................................24 10.1 DC Parameters ......................................................................................................................24 10.2 AC Parameters.......................................................................................................................25 11 12 13 14 TYPICAL APPLICATION CIRCUITS.............................................................................................26 11.1 Good Audio Design Practices ................................................................................................27 DIE PHYSICAL LAYOUT...............................................................................................................28 12.1 ISD1740A/50A/60A................................................................................................................28 ORDERING INFORMATION .........................................................................................................29 VERSION HISTORY......................................................................................................................30 Confidential -3- Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 1 GENERAL DESCRIPTION The Winbond(R) ISD1700A ChipCorder(R) Series is a high quality, fully integrated, single-chip multimessage voice record and playback device ideally suited to a variety of electronic systems. The message duration is user selectable in ranges from 26 seconds to 120 seconds, depending on the specific device. The sampling frequency of each device can also be adjusted from 4 kHz to 12 kHz with an external resistor, giving the user greater flexibility in duration versus recording quality for each application. Operating voltage spans a range from 2.4 V to 5.5 V to ensure that the ISD1740A/50A/60A devices are optimized for a wide range of battery or line-powered applications. The ISD1740A/50A/60A devices incorporate a proprietary message management system that allows the chip to self-manage address locations for multiple messages. This unique feature provides sophisticated messaging flexibility in a simple push-button environment. The devices include an onchip oscillator (with external resistor control), microphone preamplifier with Automatic Gain Control (AGC), an auxiliary analog input, anti-aliasing filter, Multi-Level Storage (MLS) array, smoothing filter, volume control, Pulse Width Modulation (PWM) Class D speaker driver, and current output. The ISD1740A/50A/60A devices also support an optional "vAlert" (voiceAlert) feature that can be used as a new message indicator. With vAlert, the IC strobes an external LED to indicate that a new message is present. Four special sound effect locations are reserved for audio confirmation of commands, such as "Start Record", "Stop Record," and "Erase." Recordings are stored in on-chip Flash memory cells, providing zero-power message storage. This unique single-chip solution is made possible through Winbond's patented Multi-Level Storage (MLS) technology. Audio data are stored directly in solid-state memory without digital compression, providing superior quality voice and music reproduction. Voice signals can be fed into the chip through two independent paths: a differential microphone input and a single-ended analog input. For outputs, the ISD1740A/50A/60A devices simultaneously provide a Pulse Width Modulation (PWM) Class D speaker driver and a separate current output. The PWM can directly drive a standard 8 speaker or a typical buzzer, while the separate single-ended current output can drive an external amplifier. The ISD1740A/50A/60A devices automatically enter into power down mode for power conservation when an operation is completed. Notice: The specifications are subject to change without notice. Please contact Winbond Sales Offices or Representatives to verify current or future specifications. -4- ISD1700A SERIES 2 FEATURES * Integrated message management systems for single-chip, push-button applications o REC : level-trigger for recording o PLAY : edge-trigger for individual message or level-trigger for sequential playback o ERASE : edge-triggered erase for first or last message or level-triggered erase for all messages o FWD : edge-trigger to advance to the next message or fast message scan during the playback o VOL : 8 levels output volume control o RDY: ready or busy status indication o RESET : bring back to the default state o Automatic power-down after each operation cycle * Selectable sampling frequency controlled by an external oscillator resistor Sampling Frequency Rosc 12 kHz 60 k ISD1740A 26 ~ 80 sec 8 kHz 80 k 6.4 kHz 100 k 5.3 kHz 120 k 4 kHz 160 k * Selectable message duration Device Duration ISD1750A 33 ~ 100 sec ISD1760A 40 ~ 120 sec Message and operation indicators o Four customizable Sound Effects (SE) for audible indications o Optional vAlert (voiceAlert) to indicate the presence of new messages o LED: stay on during recording, blink during playback, forward and erase operations Two individual input channels o MIC+/MIC-: differential microphone inputs with AGC (Automatic Gain Control) o AnaIn: single-ended auxiliary analog input for recording or feed-through Dual output channels o PWM Class D speaker amplifier to directly drive an 8 speaker or a typical buzzer o AUD single-ended current output to drive external power amplifier ChipCorder standard features o High-quality, natural voice and audio reproduction o 2.4V to 5.5V operating voltage o 100-year message retention (typical) o 10,000 record cycles (typical) * * Commercial Temperature grade: 0C to +50C for die only Package options: available in die only Confidential -5- Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 3 BLOCK DIAGRAM ROSC Internal Clock AnaIn Amp Timing Sampling Clock AnaIn Amp AntiAliasing Filter AUD MUX Nonvolatile Multi-Level Storage Array MIC+ MICAGC Smoothing Filter Volume Control SP+ Amp SP- AGC Amp Automatic Gain Control Power Conditioning Device Control Others VCCA VSSA VCCP VSSP1 VSSP2 VSSD VCCD REC PLAY ERASE FWD FT RESET VOL RDY LED NC TE1 TE2 TE3 -6- ISD1700A SERIES 4 PINOUT CONFIGURATION V CCD LED RESET NC TE1 TE2 TE3 V SSA AnaIn MIC+ MICV SSP2 SPV CCP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 V SSD RDY FWD ERASE REC PLAY FT V CCA R OSC VOL AGC AUD V SSP1 SP+ ISD1740A ISD1750A ISD1760A 22 21 20 19 18 17 16 15 PDIP Samples Only Confidential -7- Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 5 PIN DESCRIPTION PIN NAME VCCD PDIP PIN NO. 1 FUNCTIONS Digital Power Supply: It is important to have a separate path for each power signal including VCCD, VCCA and VCCP to minimize the noise coupling. Decoupling capacitors should be as close to the device as possible. LED: This output turns on a LED during a record cycle and blinks LED during playback, forward and erase operations. RESET: When Low, the device enters into a known state and initializes all pointers to the default state. This pin has an internal pull-up resistor [1]. NC: No Connect. Test pin #1: Connect to VCCD. Test pin #2: Connect to VCCD. Test pin #3: Connect to VCCD. Analog Ground: It is important to have a separate path for each ground signal including VSSA, VSSD, VSSP1 and VSSP2 to minimize the noise coupling. AnaIn: Auxiliary analog input to the device for recording or feed-through. An AC-coupling capacitor (typical 0.1uF) is necessary and the amplitude of the input signal should not exceed 1.0 Vpp. MIC+: Non-inverting input of the differential microphone signal. The input signal should be AC-coupled to this pin via a series capacitor. The capacitor value, together with an internal 10 K resistance on this pin, determines the low-frequency cutoff for the pass band filter. MIC-: Inverting input of the differential microphone signal. The input signal should be AC-coupled to the MIC+ pin. It provides input noisecancellation, or common-mode rejection, when the microphone is connected differentially to the device. Ground for Negative PWM Speaker Driver: It is important to have a separate path for each ground signal including VSSA, VSSD, VSSP1 and VSSP2 to minimize the noise coupling. SP-: The negative Class D PWM provides a differential output with SP+ pin to directly drive an 8 speaker or typical buzzer. During power down or recording, this pin is tri-stated. Power Supply for PWM Speaker Driver: It is important to have a separate path for each power signal including VCCD, VCCA and VCCP to minimize the noise coupling. Decoupling capacitors to VSSP1 and VSSP2 should be as close to the device as possible. The VCCP supply and VSSP ground pins have large transient currents and need low impedance returns to the system supply and ground, respectively. SP+: The positive Class D PWM provides a differential output with the SP- pin to directly drive an 8 speaker or typical buzzer. During power down or recording, this pin is tri-stated. LED RESET 2 3 4 5 6 7 8 NC TE1 TE2 TE3 VSSA AnaIn 9 MIC+ 10 MIC- 11 VSSP2 12 SPVCCP 13 14 SP+ 15 -8- ISD1700A SERIES PIN NAME VSSP1 PDIP PIN NO. 16 FUNCTIONS Ground for Positive PWM Speaker Driver: It is important to have a separate path for each ground signal including VSSA, VSSD, VSSP1 and VSSP2 to minimize the noise coupling. Auxiliary Output: AUD is a single-ended current output. It can be used to drive an external amplifier. Automatic Gain Control (AGC): The AGC adjusts the gain of the preamplifier dynamically to compensate for the wide range of microphone input levels. The AGC allows the full range of signals to be recorded with minimal distortion. The AGC is designed to operate with a nominal capacitor of 4.7 F connected to this pin. Connecting this pin to ground (VSSA) provides maximum gain to the preamplifier circuitry. Conversely, connecting this pin to the power supply (VCCA) provides minimum gain to the preamplifier circuitry. Volume Control: This control has 8 steps of volume adjustment. Each Low pulse decreases the volume by one level. Repeated pulses decrease the volume level from the current setting to the minimum then increase back to the maximum, and continue this loop. The factory default is set at maximum. This pin has an internal pull-up device [1] and an internal debounce (TDeb) [2] for start and end, allowing the use of a push button switch. Oscillator Resistor: A resistor connected from ROSC pin to ground determines the sample frequency of the device, which sets the duration. Please refer to the Duration Section for details. Analog Power Supply. It is important to have a separate path for each power signal including VCCD, VCCA and VCCP to minimize the noise coupling. Decoupling capacitors to VSSA should be as close to the device as possible. Feed-through: When FT is engaged Low, the AnaIn feed-through path is activated. As a result, the AnaIn signal is transmitted directly from AnaIn to both the Speaker and AUD outputs, via the volume control circuit. This pin has an internal pull-up device [1] and an internal debounce (TDeb) [2] for start and end, allowing the use of a push button switch. Playback: Pulsing PLAY to Low once initiates a playback operation. Playback stops automatically when it reaches the end of the message. Pulsing it to Low again during playback stops the operation. Holding PLAY Low constantly functions as a sequential playback operation loop. This looping continues until PLAY returns to High. This pin has an internal pull-up device [1] and an internal debounce (TDeb) [2] for start and end, allowing the use of a push button switch. AUD AGC 17 18 VOL 19 ROSC 20 VCCA 21 FT 22 PLAY 23 Confidential -9- Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES PIN NAME PDIP PIN NO. 24 FUNCTIONS Record: The device starts recording whenever REC switches from High to Low and stays at Low. Recording stops when the signal returns to High. This pin has an internal pull-up device [1] and an internal debounce (TDeb) [2] for start and end, allowing the use of a push button switch. Erase: When active, it starts an erase operation. Erase operation will take place only when the playback pointer is positioned at either the first or last message. Pulsing this pin to Low enables erase operation and deletes the current message. Holding this pin Low for more than 3 sec. initiates a global erase operation, and will delete all the messages. This pin has an internal pull-up device [1] and an internal debounce (TDeb) [2] for start and end, allowing the use of a push button switch. Forward: When triggered, it advances to the next message from the current location, when the device is in power down status. During playback cycle, pulsing this pin Low stops the current playback operation and advances to the next message, and then re-starts the playback operation of the new message. This pin has an internal pull-up device [1] and an internal debounce (TDeb) [2] for start and end, allowing the use of a push button switch. Ready: An open drain output. This pin stays Low during record, play, erase and forward operations and stays High in power down state. Digital Ground: It is important to have a separate path for each ground signal including VSSA, VSSD, VSSP1 and VSSP2 to minimize the noise coupling.. [2] REC ERASE 25 FWD 26 RDY VSSD 27 28 Note: [1] 600 k TDeb = Refer to AC Timing - 10 - ISD1700A SERIES 6 FUNCTIONAL DESCRIPTION 6.1 DETAILED DESCRIPTION 6.1.1 Audio Quality Winbond's patented ChipCorder(R) Multi-Level Storage (MLS) technology provides a natural, high-quality record and playback solution on a single chip. The input voice signals are stored directly in the Flash memory and are reproduced in their natural form without any of the compression artifacts caused by digital speech solutions. 6.1.2 Message Duration The ISD1740A/50A/60A devices offer record and playback duration from 26 seconds to 120 seconds. Sampling rate and message duration are determined by an external resistor connected to the ROSC pin. Table 6.1 Duration vs. Sampling Frequency Sample Rate 12 kHz 8 kHz 6.4 kHz 5.3 kHz 4 kHz 6.1.3 ISD1740A 26 sec 40 sec 50 sec 60 sec 80 sec ISD1750A 33 sec 50 sec 62 sec 75 sec 100 sec ISD1760A 40 sec 60 sec 75 sec 90 sec 120 sec Flash Storage The ISD1740A/50A/60A devices utilize embedded Flash memory to provide non-volatile storage. A message can be retained for a minimum of 100 years without power. Additionally, each device can be re-recorded over 10,000 times (typical). 6.2 MEMORY ARRAY ARCHITECTURE The memory array provides storage for four special Sound Effects (SE) and the audio data. The memory array is addressed by rows. A row is the minimum storage resolution by which the memory can be addressed. The memory assignment is handled automatically by the internal message management system. The four sound effects occupy four rows of the first sixteen rows in the memory array. The minimum storage resolution varies with the sampling frequency, as shown in Table 6.2. Table 6.2 Minimum Storage Resolution vs. Sampling Frequency Sampling Frequency Minimum Storage Resolution 12 kHz 83.3 msec 8 kHz 125 msec 6.4 kHz 156 msec 5.3 kHz 187 msec 4 kHz 250 msec For example, at 8 kHz sampling frequency, the minimum storage resolution is 125 msec, so, each Sound Effect (SE) is approximately 0.5 seconds long. The remaining memory is dedicated to audio data storage. Confidential - 11 Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 6.3 MODES OF OPERATIONS The ISD1740A/50A/60A devices are designed to operate in push-button operation only. Push-button operation entails use of the REC , PLAY , FT , FWD , ERASE , VOL and RESET pins to trigger operations. The internal state machine automatically configures the signal path according to the operation requested. In this mode of operation, the internal state machine takes full control of message management. This allows the user to record, playback, erase, and forward messages without the needs to know the exact addresses of the messages storage inside the memory. For additional information, please refer to Section 7. - 12 - ISD1700A SERIES 7 PUSH-BUTTON OPERATIONS The user utilizes the REC , PLAY , FT , FWD , ERASE , VOL or RESET pin to initiate an operation. The device automatically enters the power-down state at the end of a PLAY, REC, ERASE, FWD, VOL, or RESET operation. 7.1 OPERATION OVERVIEW After power-on-reset (POR), the device is in the factory default state and two internal record and playback pointers are initialized. (Detailed information about these two pointers is provided later in this Section.) Then, the active analog path configuration is determined by the state of the FT , and by the operation requested (e.g. record, playback, or power down). Up to four optional sound effects (SE1-4) can be programmed into the device to provide audible feedback to alert the user about the operating status. Separately, the LED output provides visual feedback on the operating state even if no sound effects are programmed. A circular message management technique is implemented. Recorded messages are stored sequentially into the memory from the beginning to the end in a circular manner. Two internal pointers, the record pointer and playback pointer, determine the point at which an operation starts. After power-on or RESET , these pointers are initialized as follows: * If no messages are present, both point to the beginning. * If messages are present, the record pointer points to the next available memory location after the last message and the playback pointer points to the beginning of the last recorded message. The playback pointer is affected primarily by the FWD operation. The record pointer is updated to the next available memory location after each REC operation. 7.1.1 Record Operation Recording is controlled by the REC . Setting this pin Low starts a record operation. The device will start recording from the next available location in memory and will continue recording until either the REC is returned High or the memory becomes full. The source of the recording is from either MIC or AnaIn, whereas the active analog configuration path is determined by the desired operation and the state of the FT . The REC is debounced internally. After recording, the record pointer will move from the last recorded message to the next available address and the playback pointer will be positioned at the beginning of the newly recorded message. It is important for an Erase operation to be performed on the desired location before any recording proceeds. Also, the power supply must remain On during the entire process of recording. If power is interrupted during recording, the LED will blink seven times, which indicates that something unusual has occurred. In this event, performing a Global Erase will reset the chip back to its proper state. Confidential - 13 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES Message record indicators: a) When REC goes Low: * If present, SE1 is played and LED flashes once. * Then, the LED stays On to indicate that a recording is in progress. b) When REC goes High or when the memory is full: * If present, SE2 is played and the LED flashes twice, and then remains Off to alert the user that the recording process has been completed. Triggering of REC during a play, erase or forward operation is an illegal operation and will be ignored. 7.1.2 Playback Operation Two playback modes are executed by PLAY , which is internally debounced. a) Edge-trigger mode: Pulsing PLAY Low once initiates a playback operation of the current message. Playback automatically stops at the end of the message. Pulsing PLAY again will re-play the message. During playback, the LED flashes and goes Off when the operation stops. Pulsing PLAY to Low again during playback stops the operation. Under these circumstances, the playback pointer remains at the start of the played message after the operation is completed. b) Sequential Playback mode: If PLAY is held Low constantly, all messages will be played and looped from the current message to its previous message. This looping continues until PLAY is released. After each message, SE1 is played. After the last message has been played, SE2 is played, and then device plays the first message again. During the entire playback operation, the LED flashes. When playback stops, the playback pointer will be placed at the start of the halted message. Triggering PLAY during a record, erase, or forward operation is an illegal operation and will be ignored. 7.1.3 Forward Operation The FWD allows the user to move the playback pointer to the next message in a forward direction. When the pointer reaches the last message, it will jump back to the first message. Hence, the movement is in a circular fashion among the messages. The FWD is debounced internally. The effect of a Low-going pulse on the FWD depends on the current state of the device: a) If the device is in power-down state and the current location of the playback pointer is not the last message: the pointer will advance one message and, if present, SE1 is played. The LED flashes once. - 14 - ISD1700A SERIES b) If the device is in power-down state and the current location of the play pointer is the last message: the pointer will advance to the first message and, if present, SE2 is played. The LED will flash twice. c) If the device is currently playing a message that is not the last one: * Playback is halted. * The playback pointer is advanced one message. * If present, SE1 is played. * Playback of the next message begins. * The LED flashes during this entire process. d)If the device is currently playing a message that is the last one: * Playback is halted. * The playback pointer is advanced to the first message. * If present, SE2 is played. * Playback of the first message begins. * The LED flashes during this entire process. Triggering of the FWD operation during an erase or record operation is an illegal operation and will be ignored. 7.1.4 Erase Operation Erasing individual message takes place only if the playback pointer is at either the first or the last message. Erasing individual messages other than the first or last message is not possible. However, global erase can be executed at any message location and will erase all messages. These two erase modes are characterized as follows: a) Individual Erase: Only the first or last messages can be individually erased. Pulsing ERASE Low performs actions dependent upon the current location of the playback pointer: * If the device is idle and the playback pointer is currently pointing to the first message: o o o First message is erased. SE2, if present, will be played and the LED will flash twice. Playback pointer will be updated to point to the new first message (previously, the second message). Last message is erased. SE2, if present, will be played and the LED will flash twice. Playback pointer will be updated to point to the new last message (previously, the second to last message). * If the device is idle and the playback pointer is currently pointing to the last message: o o o Confidential - 15 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES * If the device is idle and the playback pointer is not currently pointing to the first or last message: o o o No message is erased. SE3, if present, will be played and the LED will flash twice. Play pointer will be unchanged. * If the device is currently playing the first or last message, pressing ERASE will delete the current message, as in the related cases described above. b) Global Erase: Level-triggering this pin at Low for more than 2.5 seconds initiates the Global Erase operation and deletes all messages, except the SEs. If SEs are present, the device will play SE1 three times after ERASE is held for 2.5 seconds. If ERASE is not released during the playback of SE1, all messages will be erased, and the chip will play SE4. See Figure 7.1 for the operation details. The ERASE is debounced internally. Triggering ERASE for individual erase during a record or forward operation is an illegal operation and will be ignored. However, triggering ERASE for an individual erase operation during playback will delete the current played message, if it is the first or last one. ERASE key is Pressed and Held Global Erase Starts here 2.5 seconds Case 1 : Current messge location : 1st or Last Erase 1st or last message Play SE2 Wait Play SE1 Play SE1 Play SE1 Global Erase Play SE4 Play SE1 3 times to Warn for Glabal Erase to start. Release ERASE key to abort the operation Case 2 : Current messge location : Not at 1st or Last Play SE3 Wait Play SE1 Play SE1 Play SE1 Global Erase Play SE4 Figure 7.1: Global Erase Operation 7.1.5 Reset Operation A 0.1 F capacitor is recommended to connect RESET to ground if a push button switch is used on this pin. When RESET is triggered, the device will place both the record and the playback pointers at the last message. When a microcontroller is used for a power-on-Reset, - 16 - ISD1700A SERIES RESET must stay active for at least 1 sec after all supply rails reach their proper specifications. 7.1.6 VOL Operation Pulsing VOL Low changes the volume output. Each pulse on VOL will decrease the volume until the minimum setting is reached. Subsequent pulses will increase the volume until the maximum level is reached and the cycle will start again. There are 8 steps of volume control. Each step changes the volume by 4 dB. The VOL is debounced internally. A RESET operation will re-initialize the volume level to the default state, which is the maximum level. 7.1.7 FT (Feed-Through) Operation The FT controls the feed-through path from the input to the output of the chip. When FT is held Low, FT mode is enabled. By factory default, FT mode will pass AnaIn to SPK and AUD outputs if the device is idle. It will record AnaIn to the memory during a record operation. 7.2 VALERT FEATURE (OPTIONAL) If this optional feature is enabled, after a recording operation, the LED output will blink once every few seconds to indicate the presence of a new message. After a subsequent playback operation, the vAlert will stop flashing. 7.3 SOUND EFFECT (SE) EDITING SE editing can be accessed via push buttons. The first sixteen addresses are shared equally by four Sound Effects (SE1, SE2, SE3, and SE4). 7.3.1 o o o o Sound Effects SE1: Beginning of recording, forward or global erase warning SE2: End of recording, single erase or forward from last message SE3: Invalid operation SE4: Global erase The functions of SEs are as follows: Whether or not the SEs are programmed, the LED will flash accordingly. The LED flashes once for SE1, twice for SE2, and so on. The frequency of flashing depends upon the sampling frequency selected and the power supply level used. Confidential - 17 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 7.3.2 * Entering SE Mode First press and hold FWD Low for more than 3 seconds. This action on FWD will play SE1 and cause the LED to blink once (if at the last message location, the chip will play SE2 and the LED will blink twice). While holding FWD Low, press and hold the REC Low until the LED blinks once. The device is now in SE editing mode. The LED flashing once indicates that SE1 is accessible. SE Editing * * 7.3.3 * When in SE editing mode, one can perform record, play, or erase operation on each SE by pressing the appropriate button. For example, to record SE, simply press and hold REC . Similarly for play and erase functions, press and hold PLAY or ERASE , respectively. A FWD operation moves the record and playback pointers to the next SE sequentially. The LED will blink 1~4 times after such operations to indicate which SE is active. If FWD is pressed while accessing SE4, the LED will flash once to indicate that SE1 is again active. While the LED is blinking, the device will ignore any input commands. The User must wait until the LED stops blinking before any record, play or erase command can be sent. Exiting SE Mode * * 7.3.4 * First press and hold FWD until the LED stops blinking. Then, simultaneously press and hold the REC Low until the LED blinks twice and SE2 (if present) is played. The device has now exited from SE editing mode. Sound Effect Duration 7.3.5 The duration of sound effects is determined by the sampling frequency selected. All sound effects with the same sampling frequency have the same duration. Table 8.1 Sound Effect Duration vs. Sampling Frequency Sampling Frequency Duration of SE 12 kHz 0.33 sec 8 kHz 0.5 sec 6.4 kHz 0.625 sec 5.3 kHz 0.75 sec 4 kHz 1 sec - 18 - ISD1700A SERIES 7.4 ANALOG INPUTS 7.4.1 Microphone Input INTERNAL TO THE DEVICE Ccoup 0.1uF Ra = 7K MIC + Ccoup 0.1uF MIC Fcutoff=1/(2*pi*Ra*Ccoup) Ra = 7K AGC MIC IN Figure 7.2: MIC input impedance (When this path is active) 7.4.2 AnaIn Input INTERNAL TO THE DEVICE Ccoup 0.1uF Ra = 42K ANAIN Ra = 42K ANAIN INPUT AMPLIFIER Fcutoff=1/(2*pi*Ra*Ccoup) Figure 7.3: AnaIn input impedance (When the device is powered-up) Confidential - 19 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 8 TIMING DIAGRAMS 8.1 RECORD, PLAY AND ERASE Tf REC Tr TDeb TDeb TSTOP RDY TSET TSE2 LED TSE1 Mic+/-, AnaIn Figure 8.1: Record Operation - 20 - ISD1700A SERIES Tf PLAY TDeb RDY TPSetUp LED Tr TDeb TPStop Sp+, Sp- Playback the Entire Message Tf PLAY Tr TDeb TDeb RDY TPSetUp LED TPStop Sp+, Sp- Start Playback and Stop Playback Figure 8.2: Playback Operation Confidential - 21 Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES Tf Tr ERASE TDeb TDeb RDY TEStop Erase with SE Figure 8.3: Erase Operation - 22 - ISD1700A SERIES 9 ABSOLUTE MAXIMUM RATINGS ABSOLUTE MAXIMUM RATINGS CONDITIONS Junction temperature Storage temperature range Voltage applied to any pins Power supply voltage to ground potential 150C -65C to +150C (VSS -0.3 V) to (VCC +0.3 V) -0.3 V to +7.0 V VALUES Note: Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability and performance. Functional operation is not implied at these conditions. 9.1 OPERATING CONDITIONS OPERATING CONDITIONS CONDITIONS Operating temperature range Supply voltage (VCC) Ground voltage (VSS) Input voltage (VCC) [1] [1] [2] VALUES 0C to +50C +2.4 V to +5.5 V 0V 0 V to 5.5 V (VSS -0.3 V) to (VDD +0.3 V) Voltage applied to any pins [1] [2] VCC = VCCA = VCCD= VCCP VSS = VSSA = VSSD = VSSP1 VSSP2 Confidential - 23 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 10 ELECTRICAL CHARACTERISTICS 10.1 DC PARAMETERS PARAMETER Supply Voltage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Record Current Playback Current Erase Current Standby Current Input Leakage Current Input Current Low Preamp Input Impedance AnaIn Input Impedance MIC Differential Input AnaIn Input Voltage Gain from MIC to SP+/Speaker Output Load Speaker Output Power SYMBOL VDD VIL VIH VOL VOH IDD_Record IDD_Playback IDD_Erase ISB IILPD1 IILPD2 RMIC+,RMICRAnaIn VIN1 VIN2 AMSP RSPK Pout 6 8 670 313 117 49 Speaker Output Voltage AUD Total Harmonic Distortion Notes: [1] [2] [3] [4] [5] MIN 2.4 VSS-0.3 0.7xVDD VSS-0.3 0.7xVDD TYP [1] MAX 5.5 0.3xVDD VDD 0.3xVDD VDD 20 20 20 UNITS V V V V V mA mA mA A A A k k CONDITIONS IOL = 4.0 mA[2] IOH = -1.6 mA[2] VDD = 5.5 V, No load, Sampling freq = 12 kHz 0.5 -3 7 42 15 1 1 -10 VDD = 5.5 V, T=25C [3] [4] Force VDD Force VSS , others at Vcc Power-up AGC Power-up Peak-to-Peak[5] Peak-to-Peak VIN = 15~300 mV, AGC = 4.7 F, VCC = 2.4V~5.5V Across both Speaker pins VDD = 5.5 V 1Vp-p, VDD = 4.4 V 1 kHz sine wave at VDD= 3 V AnaIn. RSPK VDD= 2.4 V = 8 . RSPK = 8 (Speaker), Typical buzzer VDD =4.5 V, REXT= 390 15 mV p-p 1 kHz sine wave, Cmessage weighted 300 1 40 mV V dB mW mW mW mW V mA % VOUT1 IAUD THD VDD -3.0 1 Conditions: VCC = 4.5V, 8 kHz sampling frequency and TA = 25C, unless otherwise stated. LED output during Record operation. VCCA, VCCD and VCCP are connected together. VSSA, VSSP1, VSSP2 and VSSD are connected together. REC , PLAY , FT , FWD , ERASE , VOL and RESET must be at VCCD. Balanced input signal applied between MIC+ and MIC- as shown in the applications example. Single-ended MIC+ or MIC- input is recommended to be less than 100 mV p-p. - 24 - ISD1700A SERIES 10.2 AC PARAMETERS CHARACTERISTIC Sampling Frequency Duration [3] [2] SYMBOL FS TDur Tr Tf TDeb MIN 4 TYP [1] Section 6.1.2 MAX 12 100 100 UNITS kHz sec nsec nsec msec msec msec msec msec sec CONDITIONS Vcc=2.4 V~5.5V Vcc=2.4 V~5.5V, all Fs Rising time Falling Time Debounce Time (REC, PLAY, ERASE, FWD, VOL) 0 0 16 24 30 37 48 FS =12 kHz FS =8 kHz FS =6.4 kHz FS =5.3 kHz FS =4 kHz Vcc=2.4 V~5.5 V RESET Pulse Record SetUp Time TRESET TRSetUp 1 0.37 0.54 0.67 0.80 1.05 Vcc=2.4 V~5.5 V FS =12 kHz FS =8 kHz FS =6.4 kHz FS =5.3 kHz FS =4 kHz FS =12 kHz FS =8 kHz FS =6.4 kHz FS =5.3 kHz FS =4 kHz Vcc=2.4 V~5.5 V, all Fs Vcc=2.4 V~5.5 V, all Fs FS =12 kHz FS =8 kHz FS =6.4 kHz FS =5.3 kHz FS =4 kHz Vcc=2.4 V~5.5 V Vcc=2.4 V~5.5 V Playback at any FS Vcc=2.4 V~5.5 V, with SEs played Vcc=2.4 V~5.5 V, with SEs played Vcc=2.4 V~5.5 V, with SEs played sec sec sec sec sec sec sec sec sec sec msec msec sec sec sec sec sec msec msec 6 Hz Record Stop Time TRStop 0.35 0.52 0.65 0.77 1.03 Play SetUp Time Play Stop Time Erase Stop Time TPSetUp TPStop TEStop 100 33 0.34 0.51 0.64 0.77 1.02 AUD Ramp Up Time AUD Ramp down Time LED Cycle frequency Notes: [1] [2] [3] TRU TRD TCyc 1 4 4 Typical values: VCC = 4.5 V, SF = 8 kHz and @ TA = 25C, unless otherwise stated. Sampling Frequency can vary as much as 2.25 percent over the temperature and voltage ranges. Duration can vary as much as 2.25 percent over the commercial temperature and voltage ranges. Confidential - 25 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 11 TYPICAL APPLICATION CIRCUITS Two example circuits illustrate recording via MIC and AnaIn inputs, respectively. show typical implementations of ISD1740A/50A/60A devices. . Example #1: These examples vAlert 24 23 25 26 19 3 22 VCC 4.7 K 4.7 F 4.7 K 10 0.1 F 0.1 F 4.7 K Rosc ** 9 20 18 ** Sample Freq [kHz]: 12 8 6.4 4 Rosc [K ] 60 80 100 160 4.7 F 11 Vcc 7 6 5 4 REC PLAY ERASE FWD VOL RESET FT TE3 TE2 TE1 NC MIC+ MIC ANA IN ROSC AGC LED 2 VCCD 1 VSSD 28 VCCA 21 VSSA 8 1 K D1 VCC *** VCCA VCCD VCCP VCCA 0.1 F * *** VCCD 0.1 F * ISD1740A ISD1750A ISD1760A VCCP 14 VSSP1 16 0.1F VSSP2 12 SP+ SP- 13 AUD 17 15 VCCP * 0.1 F * Speaker or Buzzer VCC Speaker Q1 8050C R6 390 RDY 27 C5 0.1 F Optional: based upon the applications Recording via MIC input Notes: * These capacitors may be needed in order to optimize for the best voice quality, which is also dependent upon the layout of the PCB. Depending on system requirements, they can be 10 F, 4.7 F or other values. Please refer to the ChipCorder Applications section or consult Winbond for layout advice. ** For Sampling Freq at 8 kHz, Rosc = 80 K *** It is important to have a separate path for each ground and power back to each terminal to minimize the noise. Also, the power supplies should be decoupled as close to the device as possible. - 26 - ISD1700A SERIES Example #2: S1 S2 S3 S4 S5 S6 S7 Vcc vAlert 24 23 25 26 19 3 22 7 6 5 4 10 11 C2 0.1 F R2 ** REC PLAY ERASE FWD VOL RESET FT TE3 TE2 TE1 NC MIC+ MIC - LED 2 VCCD 1 VSSD 28 VCCA 21 VSSA 8 R1 1 K D1 VCC *** VCCA VCCD VCCP VCCA C9 * C11 * Vcc Gnd C4 0.1 F VCCD C8 * C5 0.1 F *** ISD1740A ISD1750A ISD1760A VCCP 14 C6 VSSP1 16 0.1F VSSP2 12 SP+ SP- 13 AUD 17 15 VCCP C10 * C7 0.1 F Speaker or Buzzer VCC Speaker Q1 8050C 390 0.1 F 9 20 18 ANA IN ROSC AGC RDY 27 C1 4.7 F Optional: based upon the applications Recording via AnaIn input Notes: * These capacitors may be needed in order to optimize for the best voice quality, which is also dependent upon the layout of the PCB. Depending on system requirement, they can be 10 F, 4.7 F or other values. Please refer to ChipCorder Applications section or consult Winbond for layout advice. ** For Sampling Freq at 8 kHz, R2 = 80 K *** It is important to have a separate path for each ground and power back to the related terminal to minimize the noise. Also, the power supplies should be decoupled as close to the device as possible. 11.1 GOOD AUDIO DESIGN PRACTICES To ensure the highest quality of voice reproduction, it is important to follow good audio design practices in layout and power supply decoupling. See Application Information or links below for details. Good Audio Design Practices http://www.winbond-usa.com/products/isd_products/chipcorder/applicationinfo/apin11.pdf Single-Chip Board Layout Diagrams http://www.winbond-usa.com/products/isd_products/chipcorder/applicationinfo/apin12.pdf Confidential - 27 Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 12 DIE PHYSICAL LAYOUT 12.1 ISD1740A/50A/60A[1][2] ERASE RESET VCCD VSSD TE1 TE2 TE3 FWD LED NC RDY REC PLAY FT ISD1740A ISD1750A ISD1760A VSSA AnaIn MIC+ MICVSSP2 VCCA Rosc VOL AGC VCCP VCCP SP- VSSP1 Notes: [1] The backside of the die is internally connected to VSSA. It MUST NOT be connected to any other potential or damage may occur. Please contact the local Winbond Sales Offices or Representatives for details on (x,y) coordinates. [2] - 28 - AUD SP+ ISD1700A SERIES 13 ORDERING INFORMATION Product Number Descriptor Key ISD17xxA x Product Family : ISD1000 Family Product Series : ISD1700 Series Special Features Field: Blank = vAlert disabled 01 = vAlert enabled Duration : 40A = 50A = 60A = 40 seconds 50 seconds 60 seconds Packaged Units / Die : X = Die When ordering ISD1740A/ISD1750A/ISD1760A, please refer to the following valid ordering numbers, which are planned to be supported in volume for this product series. Please consult the local Winbond Sales Representatives for availability information. Part Number ISD1740A ISD1750A ISD1760A I1740AX I1750AX I1760AX Ordering Number No vAlert With vAlert I1740AX01 I1750AX01 I1760AX01 For the latest product information, please access Winbond's worldwide web site at http://www.winbond-usa.com Confidential - 29 - Publication Release Date: March 28, 2005 Revision A0 ISD1700A SERIES 14 VERSION HISTORY VERSION A0 DATE March 2005 Initial version DESCRIPTION - 30 - ISD1700A SERIES The contents of this document are provided only as a guide for the applications of Winbond products. Winbond makes no representation or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to discontinue or make changes to specifications and product descriptions at any time without notice. No license, whether express or implied, to any intellectual property or other right of Winbond or others is granted by this publication. Except as set forth in Winbond's Standard Terms and Conditions of Sale, Winbond assumes no liability whatsoever and disclaims any express or implied warranty of merchantability, fitness for a particular purpose or infringement of any Intellectual property. The contents of this document are provided "AS IS", and Winbond assumes no liability whatsoever and disclaims any express or implied warranty of merchantability, fitness for a particular purpose or infringement of any Intellectual property. In no event, shall Winbond be liable for any damages whatsoever (including, without limitation, damages for loss of profits, business interruption, loss of information) arising out of the use of or inability to use the contents of this documents, even if Winbond has been advised of the possibility of such damages. Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipments intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Furthermore, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental injury could occur. Application examples and alternative uses of any integrated circuit contained in this publication are for illustration only and Winbond makes no representation or warranty that such applications shall be suitable for the use specified. The 100-year retention and 10K record cycle projections are based upon accelerated reliability tests, as published in the Winbond Reliability Report, and are neither warranted nor guaranteed by Winbond. This product incorporates SuperFlash(R) technology. This datasheet is subject to change without notice. Information contained in this Winbond ChipCorder(R) datasheet supersedes all data for the ISD(R) ChipCorder(R) products published by ISD(R) prior to August 1998. This datasheet and any future addendum to this data sheet is (are) the complete and controlling ISD(R) ChipCorder(R) product specifications. In the event any inconsistencies exist between the information in this and other product documentation, or in the event that other product documentation contains information in addition to the information in this, the information contained herein supersedes and governs such other information in its entirety. Copyright(c) 2005, Winbond Electronics Corporation. All rights reserved. ISD(R) and ChipCorder(R) are registered trademarks of Winbond Electronics Corporation. SuperFlash(R) is the trademark of Silicon Storage Technology, Inc. All other trademarks are properties of their respective owners. Headquarters No. 4, Creation Rd. III Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5665577 http://www.winbond.com.tw/ Winbond Electronics Corporation America 2727 North First Street, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-5441797 http://www.winbond-usa.com/ Winbond Electronics (Shanghai) Ltd. 27F, 299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62356998 Taipei Office 9F, No. 480, Pueiguang Rd. Neihu District Taipei, 114 Taiwan TEL: 886-2-81777168 FAX: 886-2-87153579 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG. 3-7-18 Shinyokohama Kohokuku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. Confidential - 31 - Publication Release Date: March 28, 2005 Revision A0 |
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